OMAP 5: Difference between revisions
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The OMAP5 ([http://www.ti.com/product/omap5432 OMAP5432]) is the SoC (System on Chip) of the Pyra. It's designed | The OMAP5 ([http://www.ti.com/product/omap5432 OMAP5432]) is the SoC (System on Chip) of the Pyra. It's designed by Texas Instruments and fabricated by UMC on their 28LP process. It resides on the [[CPU-Board]], with these specifications: | ||
* 2x ARM Cortex-A15 @ 1.5Ghz with NEON SIMD | * 2x ARM Cortex-A15 @ 1.5Ghz with NEON SIMD | ||
* 2x ARM Cortex-M4</onlyinclude> | * 2x ARM Cortex-M4</onlyinclude> | ||
* PowerVR™ SGX544-MP2 (main [[GPU]]) | * PowerVR™ SGX544-MP2 (main [[GPU]]) | ||
* Vivante GC320 2D Accelerator (also part of the [[GPU]]) | * Vivante GC320 2D Accelerator (also part of the [[GPU]]) | ||
* IVA 3 HD video encode and decode | |||
* Numerous external interfaces (display, HDMI, SD/MMC, USB, etc) | |||
<pre> | <pre> | ||
Latest revision as of 10:36, 22 June 2020
The OMAP5 (OMAP5432) is the SoC (System on Chip) of the Pyra. It's designed by Texas Instruments and fabricated by UMC on their 28LP process. It resides on the CPU-Board, with these specifications:
- 2x ARM Cortex-A15 @ 1.5Ghz with NEON SIMD
- 2x ARM Cortex-M4
- PowerVR™ SGX544-MP2 (main GPU)
- Vivante GC320 2D Accelerator (also part of the GPU)
- IVA 3 HD video encode and decode
- Numerous external interfaces (display, HDMI, SD/MMC, USB, etc)
$ cat /proc/cpuinfo processor : 0 model name : ARMv7 Processor rev 2 (v7l) BogoMIPS : 6.14 Features : half thumb fastmult vfp edsp thumbee neon vfpv3 tls vfpv4 idiva idivt vfpd32 lpae evtstrm CPU implementer : 0x41 CPU architecture: 7 CPU variant : 0x2 CPU part : 0xc0f CPU revision : 2 processor : 1 model name : ARMv7 Processor rev 2 (v7l) BogoMIPS : 6.14 Features : half thumb fastmult vfp edsp thumbee neon vfpv3 tls vfpv4 idiva idivt vfpd32 lpae evtstrm CPU implementer : 0x41 CPU architecture: 7 CPU variant : 0x2 CPU part : 0xc0f CPU revision : 2 Hardware : Generic OMAP5 (Flattened Device Tree) Revision : 0000 Serial : 0000000000000000