GPU: Difference between revisions - Pyra Wiki

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This is on the [[CPU-Board]], so has a chance of being upgraded in the future.
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This is on the [[CPU-Board]], as part of the OMAP5 SoC, so has a chance of being upgraded in the future
but it cannot be changed separately to the CPU. Unlike a discrete GPU, each block reads/writes main system
memory and final video output is done by the TI DISPC display controller block.
*[http://www.imgtec.com/powervr/series5.asp PowerVR SGX SGX544-MP2]
*[http://www.imgtec.com/powervr/series5.asp PowerVR SGX SGX544-MP2]
*[http://www.vivantecorp.com/en/technology/composition.html Vivante GC320] 2D Accelerator
*[http://www.vivantecorp.com/en/technology/composition.html Vivante GC320] 2D Accelerator

Latest revision as of 10:40, 22 June 2020

This is on the CPU-Board, as part of the OMAP5 SoC, so has a chance of being upgraded in the future but it cannot be changed separately to the CPU. Unlike a discrete GPU, each block reads/writes main system memory and final video output is done by the TI DISPC display controller block.

See also:

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