Hey cool good to hear you figured it out! The aliases should be just fine, I think the only advantage for not using the aliases
would be with IO-coherent C-A15 hardware like mach-keystone. But that requires extra hoops for the addressing like
keystone does, and 5432 never was wired to be...
OK so it should be close to working then :) For the u-boot SPL debugging you need to be careful it still fits into SRAM for the size.
Hmmm OK
I think there's also something that then gets copied to DDR. I noticed this looking at the CPU1 startup address. But having code for DDR in DDR would...
Hi, I've been lurking for quite some time, your post got me curious enough to register! Just in case this might help.. I assume you are aware that igepv5 works with LPAE and 4GB with just kernel command line:
mem=2032M@0x80000000 mem=2048M@0x300000000
And I think there's the second cpu startup...
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