cachegrind


_wb_

Microbe
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I'm trying to do cachegrind profiling, but valgrind cannot auto-detect the cache config, so I'll have to set it manually. Can someone help me with that? According to the TI website (http://www.ti.com/product/omap3530#technicaldocuments), the size of the L1 cache is 32KB and the L2 cache is 256KB, but it doesn't say how it is divided between instruction and data cache, what the line sizes are, etc.


So in other words, I would like to know what options to give to cachegrind:


--I1=<size>,<associativity>,<line size>


Specify the size, associativity and line size of the level 1 instruction cache.


--D1=<size>,<associativity>,<line size>


Specify the size, associativity and line size of the level 1 data cache.


--LL=<size>,<associativity>,<line size>


Specify the size, associativity and line size of the last-level cache.


I don't even know what units these command-line arguments expect (bytes? words?).
 
Salut le belge,


Cachegrind will only simulate a cache in its VM and it is quite slow.


Maybe you can try using my perf build to monitor cache misses for real :


It's accurate and unintrusive.


Do something like:


"LD_LIBRARY_PATH=. ./perf record -e L1-dcache-misses your_program"


then "perf report" (I skip the LD_LIBRARY_PATH from now on) will list the functions that miss the most. TADA!


and "perf annotate" will even tell you on which opcodes


There are a lot of perf counters, try "perf list", and read the manual, this tool is really great for profiling on a Linux box, which our beloved Pandora is :)


Santé!


PS: If you really want to use cachegrind:


http://processors.wiki.ti.com/index.php/Cortex-A8_Architecture
 
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